How cg artists compare cpu performance

Different communication libraries, including MPI, have

been studied and implemented for the SCC [11], [12],

[13]. Porting CHARM++ on top of them is a future study,

which may result in performance improvements. There

are also many other SCC-related studies going on in

the Many-core Applications Research Community of Intel

(http://communities.intel.com/community/marc).

Esmaeilzadeh et al. [14] provide an extensive report and

analysis of the chip power and performance of five different

generations of Intel processors with a vast amount of diverse

benchmarks [14]. Such work, however, does not consider

many-cores or GPUs, which are promising architectures for

the future of parallel computing.

VII. CONCLUSION

Large increases in the number of transistors, accompanied

by power and energy limitations, introduce new challenges

for architectural design of new processors. There are several

alternatives to consider, such as heavy-weight multi-cores,

light-weight many-cores, low-power designs and SIMD-like

(GPGPU) architectures. In choosing among them, several

possibly conflicting goals must be kept in mind, such as

speed, power, energy, programmability and portability. In

this work, we evaluated platforms representing the above-

mentioned design alternatives using five scalable CHARM++

and MPI applications: Jacobi, NAMD, NQueens, CG and Sort.

The Intel SCC is a research chip using a many-core ar-

chitecture. Many-cores like the SCC offer an opportunity to

build future machines that consume low power and can run

CHARM++ and MPI code fast. They represent an intersting

and balanced design point, as they consume lower power

than heavy-weight multi-cores but are faster than low-power

processors and do not have the generality or portability issues

of GPGPU architectures. In our analysis of the SCC, we

suggested improvements in sequential performance, especially

in floating-point operation speed, and suggested adding a

global collectives network.

We showed that heavy-weight multicores are still an ef-

fective solution for dynamic and complicated applications, as

well as for those with irregular accesses and communications.

In addition, GPGPUs are exceptionally powerful for many

applications in speed, power and energy. However, they lack

the sophisticated architecture to execute complex and irregular

applications efficiently. They also require a high programming

effort to write new code, and are unable to run legacy codes.

Finally, as seen from the Intel Atom experiments, we observe

that low-power designs do not necessarily result in low energy

consumption, since they may increase the execution time

significantly. Therefore, there is no single best solution to fit

all the applications and goals.

ACKNOWLEDGMENTS

We thank Intel for giving us an SCC system and the anony-

mous reviewers for their comments. We also thank Laxmikant

Kale, Marc Snir and David Padua for their comments and

support. This work was supported in part by Intel under the

Illinois-Intel Parallelism Center (I2PC).

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